Combinational Logic Design Example: A Four-Bit Adder
In this section we consider the design of a four-bit adder; i,e. a circuit that adds together two four-bit binary numbers. This needs to be a combinational logic circuit and therefore serves as a useful exercise to apply what we have learnt.
To recap, we know that any truth table can be implemented using a product of sums or sum of products expression in either a fundamental or minimised (via Boolean algebra or Karnaugh maps for example) form. Using this approach we end up with a two-level circuit implementation of AND-OR, OR-AND, NAND-NAND or NOR-NOR. We have not yet considered the practicalities of any circuits we have designed or analysed, which is one of the purposes of this section.
We begin by looking again at both the benefits and problems of two-level circuits, before considering this means of implementation for the four-bit adder. We then move on to two other methods of implementation which rely upon a more thorough look at what we want the circuit to do, rather than simply treating it as a combinational logic problem to be approached using fixed ‘rules’.
Two-level circuits are direct implementations of sum of products and product of sums forms, either in fundamental form (straight from the truth table) or after minimisation. We now consider the advantages and disadvantages of this type of circuit:
• Any combinational logic function can be realised as a two-level circuit.
• This is theoretically the fastest implementation since signals have only to propagate through two gates.2
• They can be implemented in a variety of ways, e. g. AND-OR, OR-AND, etc.
• A very large number of gates may be required.
• Gates with a prohibitively large number of inputs may be needed.
• Signals may be required to feed to more gates than is possible (because of the electrical characteristics of the circuit).
• The task of minimisation increases exponentially with the number of input variables (although computer programs can obviously help reduce this problem).
The effect of minimising a fundamental two-kevel circuit is to reduce the first three disadvantages although it cannot be guaranteed to remove them. Note that the second disadvantage can always be overcome by using more gates (e. g. by US/J three two-input AND gates to implement a four-input AND gate) but that the means a single-level gate has itself become a two-level circuit board.