Positive and negative assertion level logic

# Positive and negative assertion level logic

Publish Date:2019-09-18 15:28:34 Clicks: 321 The idea of positive and negative assertion level logic arises directly out of duality. It is again based upon the fact that because Boolean algebra describes a two-state system then specifying the input conditions for an output of 1 also gives the condi- tions(i.e. all other input combinations) for an output of For instance the NOR operator, Y =A+B, tells us that Y=1 if the result of (A+B)is 0 (since it is inverted to give Y). However, an alternative way of interpreting this operation is that Y=0 when (A+B) is 1. Both views tell us all there is to know about how the circuit operates. The bubble on the output of the NOR gate indicates this second interpretation of the gate's operation since it signifies the output is 0 when either of the inputs is 1.

Regarding positive and negative assertion level logic, a non-bubbled input or output indicates a being input or output(positive level logic) whilst a 0indicates a 0 being input or output (negative level logic). In the case of the NOR operator such assertion level logic indicates that Y is active-LOW (gives a 0) when either A OR B is active-HIGH(an input of 1). The dual of the NOR gate tells us that Y is active HIGH if AND B are active LOW (i.e. both 0).

The value of assertion level logic is that it is sometimes informative to consider the inputs and output(s) from logic circuits in terms of when they are ‘active', which may be active--HIGH (an input or output of 0 being significant) or active- LOW (an input or output of 0 being significant). This is because it is useful to design circuits so that their function is as clear as possible from the circuit diagram.

Imagine an alarm is to be turned ON given a certain combination of variables whilst a light may have to be turned OFF It could be helpful to think of the output from the corresponding circuits being to turn ON the alarm (active- HIGH) and 0 (active-LOW) to turn OFF the light. In this case assertion level logic would be being used. Assertion level logic is also useful when interfacing to components such as microprocessors which often (because of the circuits from which they are constructed) initiate communication with other ICs by sending signals LOW.

Obviously because of duality we can always draw a circuit using the most appropriate assertion level logic. (Remember that dualling a circuit always inverts the output.) However, although circuit may be drawn certain way it may actu- ally be implemented, for practical reasons, in its dualled form.